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19#include "qemu/osdep.h"
20#include "cpu.h"
21#include "trace.h"
22#include "disas/disas.h"
23#include "exec/exec-all.h"
24#include "tcg.h"
25#include "qemu/atomic.h"
26#include "sysemu/qtest.h"
27#include "qemu/timer.h"
28#include "exec/address-spaces.h"
29#include "qemu/rcu.h"
30#include "exec/tb-hash.h"
31#include "exec/log.h"
32#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
33#include "hw/i386/apic.h"
34#endif
35#include "sysemu/replay.h"
36
37
38
39typedef struct SyncClocks {
40 int64_t diff_clk;
41 int64_t last_cpu_icount;
42 int64_t realtime_clock;
43} SyncClocks;
44
45#if !defined(CONFIG_USER_ONLY)
46
47
48
49
50#define VM_CLOCK_ADVANCE 3000000
51#define THRESHOLD_REDUCE 1.5
52#define MAX_DELAY_PRINT_RATE 2000000000LL
53#define MAX_NB_PRINTS 100
54
55static void align_clocks(SyncClocks *sc, const CPUState *cpu)
56{
57 int64_t cpu_icount;
58
59 if (!icount_align_option) {
60 return;
61 }
62
63 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
64 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
65 sc->last_cpu_icount = cpu_icount;
66
67 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
68#ifndef _WIN32
69 struct timespec sleep_delay, rem_delay;
70 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
71 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
72 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
73 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
74 } else {
75 sc->diff_clk = 0;
76 }
77#else
78 Sleep(sc->diff_clk / SCALE_MS);
79 sc->diff_clk = 0;
80#endif
81 }
82}
83
84static void print_delay(const SyncClocks *sc)
85{
86 static float threshold_delay;
87 static int64_t last_realtime_clock;
88 static int nb_prints;
89
90 if (icount_align_option &&
91 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
92 nb_prints < MAX_NB_PRINTS) {
93 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
94 (-sc->diff_clk / (float)1000000000LL <
95 (threshold_delay - THRESHOLD_REDUCE))) {
96 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
97 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
98 threshold_delay - 1,
99 threshold_delay);
100 nb_prints++;
101 last_realtime_clock = sc->realtime_clock;
102 }
103 }
104}
105
106static void init_delay_params(SyncClocks *sc,
107 const CPUState *cpu)
108{
109 if (!icount_align_option) {
110 return;
111 }
112 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
113 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
114 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
115 if (sc->diff_clk < max_delay) {
116 max_delay = sc->diff_clk;
117 }
118 if (sc->diff_clk > max_advance) {
119 max_advance = sc->diff_clk;
120 }
121
122
123
124 print_delay(sc);
125}
126#else
127static void align_clocks(SyncClocks *sc, const CPUState *cpu)
128{
129}
130
131static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
132{
133}
134#endif
135
136
137static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
138{
139 CPUArchState *env = cpu->env_ptr;
140 uintptr_t ret;
141 TranslationBlock *last_tb;
142 int tb_exit;
143 uint8_t *tb_ptr = itb->tc_ptr;
144
145 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
146 "Trace %p [" TARGET_FMT_lx "] %s\n",
147 itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
148
149#if defined(DEBUG_DISAS)
150 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
151#if defined(TARGET_I386)
152 log_cpu_state(cpu, CPU_DUMP_CCOP);
153#elif defined(TARGET_M68K)
154
155 cpu_m68k_flush_flags(env, env->cc_op);
156 env->cc_op = CC_OP_FLAGS;
157 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
158 log_cpu_state(cpu, 0);
159#else
160 log_cpu_state(cpu, 0);
161#endif
162 }
163#endif
164
165 cpu->can_do_io = !use_icount;
166 ret = tcg_qemu_tb_exec(env, tb_ptr);
167 cpu->can_do_io = 1;
168 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
169 tb_exit = ret & TB_EXIT_MASK;
170 trace_exec_tb_exit(last_tb, tb_exit);
171
172 if (tb_exit > TB_EXIT_IDX1) {
173
174
175
176
177 CPUClass *cc = CPU_GET_CLASS(cpu);
178 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
179 "Stopped execution of TB chain before %p ["
180 TARGET_FMT_lx "] %s\n",
181 last_tb->tc_ptr, last_tb->pc,
182 lookup_symbol(last_tb->pc));
183 if (cc->synchronize_from_tb) {
184 cc->synchronize_from_tb(cpu, last_tb);
185 } else {
186 assert(cc->set_pc);
187 cc->set_pc(cpu, last_tb->pc);
188 }
189 }
190 if (tb_exit == TB_EXIT_REQUESTED) {
191
192
193
194 cpu->tcg_exit_req = 0;
195 }
196 return ret;
197}
198
199#ifndef CONFIG_USER_ONLY
200
201
202static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
203 TranslationBlock *orig_tb, bool ignore_icount)
204{
205 TranslationBlock *tb;
206 bool old_tb_flushed;
207
208
209
210 if (max_cycles > CF_COUNT_MASK)
211 max_cycles = CF_COUNT_MASK;
212
213 old_tb_flushed = cpu->tb_flushed;
214 cpu->tb_flushed = false;
215 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
216 max_cycles | CF_NOCACHE
217 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
218 tb->orig_tb = cpu->tb_flushed ? NULL : orig_tb;
219 cpu->tb_flushed |= old_tb_flushed;
220
221 trace_exec_tb_nocache(tb, tb->pc);
222 cpu_tb_exec(cpu, tb);
223 tb_phys_invalidate(tb, -1);
224 tb_free(tb);
225}
226#endif
227
228struct tb_desc {
229 target_ulong pc;
230 target_ulong cs_base;
231 CPUArchState *env;
232 tb_page_addr_t phys_page1;
233 uint32_t flags;
234};
235
236static bool tb_cmp(const void *p, const void *d)
237{
238 const TranslationBlock *tb = p;
239 const struct tb_desc *desc = d;
240
241 if (tb->pc == desc->pc &&
242 tb->page_addr[0] == desc->phys_page1 &&
243 tb->cs_base == desc->cs_base &&
244 tb->flags == desc->flags) {
245
246 if (tb->page_addr[1] == -1) {
247 return true;
248 } else {
249 tb_page_addr_t phys_page2;
250 target_ulong virt_page2;
251
252 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
253 phys_page2 = get_page_addr_code(desc->env, virt_page2);
254 if (tb->page_addr[1] == phys_page2) {
255 return true;
256 }
257 }
258 }
259 return false;
260}
261
262static TranslationBlock *tb_find_physical(CPUState *cpu,
263 target_ulong pc,
264 target_ulong cs_base,
265 uint32_t flags)
266{
267 tb_page_addr_t phys_pc;
268 struct tb_desc desc;
269 uint32_t h;
270
271 desc.env = (CPUArchState *)cpu->env_ptr;
272 desc.cs_base = cs_base;
273 desc.flags = flags;
274 desc.pc = pc;
275 phys_pc = get_page_addr_code(desc.env, pc);
276 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
277 h = tb_hash_func(phys_pc, pc, flags);
278 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
279}
280
281static TranslationBlock *tb_find_slow(CPUState *cpu,
282 target_ulong pc,
283 target_ulong cs_base,
284 uint32_t flags)
285{
286 TranslationBlock *tb;
287
288 tb = tb_find_physical(cpu, pc, cs_base, flags);
289 if (tb) {
290 goto found;
291 }
292
293#ifdef CONFIG_USER_ONLY
294
295
296
297
298
299 tb_unlock();
300 mmap_lock();
301 tb_lock();
302 tb = tb_find_physical(cpu, pc, cs_base, flags);
303 if (tb) {
304 mmap_unlock();
305 goto found;
306 }
307#endif
308
309
310 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
311
312#ifdef CONFIG_USER_ONLY
313 mmap_unlock();
314#endif
315
316found:
317
318 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
319 return tb;
320}
321
322static inline TranslationBlock *tb_find_fast(CPUState *cpu,
323 TranslationBlock **last_tb,
324 int tb_exit)
325{
326 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
327 TranslationBlock *tb;
328 target_ulong cs_base, pc;
329 uint32_t flags;
330
331
332
333
334 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
335 tb_lock();
336 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
337 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
338 tb->flags != flags)) {
339 tb = tb_find_slow(cpu, pc, cs_base, flags);
340 }
341 if (cpu->tb_flushed) {
342
343
344
345 *last_tb = NULL;
346 cpu->tb_flushed = false;
347 }
348#ifndef CONFIG_USER_ONLY
349
350
351
352
353 if (tb->page_addr[1] != -1) {
354 *last_tb = NULL;
355 }
356#endif
357
358 if (*last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
359 tb_add_jump(*last_tb, tb_exit, tb);
360 }
361 tb_unlock();
362 return tb;
363}
364
365static inline bool cpu_handle_halt(CPUState *cpu)
366{
367 if (cpu->halted) {
368#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
369 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
370 && replay_interrupt()) {
371 X86CPU *x86_cpu = X86_CPU(cpu);
372 apic_poll_irq(x86_cpu->apic_state);
373 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
374 }
375#endif
376 if (!cpu_has_work(cpu)) {
377 current_cpu = NULL;
378 return true;
379 }
380
381 cpu->halted = 0;
382 }
383
384 return false;
385}
386
387static inline void cpu_handle_debug_exception(CPUState *cpu)
388{
389 CPUClass *cc = CPU_GET_CLASS(cpu);
390 CPUWatchpoint *wp;
391
392 if (!cpu->watchpoint_hit) {
393 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
394 wp->flags &= ~BP_WATCHPOINT_HIT;
395 }
396 }
397
398 cc->debug_excp_handler(cpu);
399}
400
401static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
402{
403 if (cpu->exception_index >= 0) {
404 if (cpu->exception_index >= EXCP_INTERRUPT) {
405
406 *ret = cpu->exception_index;
407 if (*ret == EXCP_DEBUG) {
408 cpu_handle_debug_exception(cpu);
409 }
410 cpu->exception_index = -1;
411 return true;
412 } else {
413#if defined(CONFIG_USER_ONLY)
414
415
416
417#if defined(TARGET_I386)
418 CPUClass *cc = CPU_GET_CLASS(cpu);
419 cc->do_interrupt(cpu);
420#endif
421 *ret = cpu->exception_index;
422 cpu->exception_index = -1;
423 return true;
424#else
425 if (replay_exception()) {
426 CPUClass *cc = CPU_GET_CLASS(cpu);
427 cc->do_interrupt(cpu);
428 cpu->exception_index = -1;
429 } else if (!replay_has_interrupt()) {
430
431 *ret = EXCP_INTERRUPT;
432 return true;
433 }
434#endif
435 }
436#ifndef CONFIG_USER_ONLY
437 } else if (replay_has_exception()
438 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
439
440 TranslationBlock *last_tb = NULL;
441 cpu_exec_nocache(cpu, 1, tb_find_fast(cpu, &last_tb, 0), true);
442 *ret = -1;
443 return true;
444#endif
445 }
446
447 return false;
448}
449
450static inline void cpu_handle_interrupt(CPUState *cpu,
451 TranslationBlock **last_tb)
452{
453 CPUClass *cc = CPU_GET_CLASS(cpu);
454 int interrupt_request = cpu->interrupt_request;
455
456 if (unlikely(interrupt_request)) {
457 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
458
459 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
460 }
461 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
462 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
463 cpu->exception_index = EXCP_DEBUG;
464 cpu_loop_exit(cpu);
465 }
466 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
467
468 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
469 replay_interrupt();
470 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
471 cpu->halted = 1;
472 cpu->exception_index = EXCP_HLT;
473 cpu_loop_exit(cpu);
474 }
475#if defined(TARGET_I386)
476 else if (interrupt_request & CPU_INTERRUPT_INIT) {
477 X86CPU *x86_cpu = X86_CPU(cpu);
478 CPUArchState *env = &x86_cpu->env;
479 replay_interrupt();
480 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
481 do_cpu_init(x86_cpu);
482 cpu->exception_index = EXCP_HALTED;
483 cpu_loop_exit(cpu);
484 }
485#else
486 else if (interrupt_request & CPU_INTERRUPT_RESET) {
487 replay_interrupt();
488 cpu_reset(cpu);
489 cpu_loop_exit(cpu);
490 }
491#endif
492
493
494
495
496 else {
497 replay_interrupt();
498 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
499 *last_tb = NULL;
500 }
501
502
503 interrupt_request = cpu->interrupt_request;
504 }
505 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
506 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
507
508
509 *last_tb = NULL;
510 }
511 }
512 if (unlikely(cpu->exit_request || replay_has_interrupt())) {
513 cpu->exit_request = 0;
514 cpu->exception_index = EXCP_INTERRUPT;
515 cpu_loop_exit(cpu);
516 }
517}
518
519static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
520 TranslationBlock **last_tb, int *tb_exit,
521 SyncClocks *sc)
522{
523 uintptr_t ret;
524
525 if (unlikely(cpu->exit_request)) {
526 return;
527 }
528
529 trace_exec_tb(tb, tb->pc);
530 ret = cpu_tb_exec(cpu, tb);
531 *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
532 *tb_exit = ret & TB_EXIT_MASK;
533 switch (*tb_exit) {
534 case TB_EXIT_REQUESTED:
535
536
537
538
539
540
541
542
543
544
545 smp_rmb();
546 *last_tb = NULL;
547 break;
548 case TB_EXIT_ICOUNT_EXPIRED:
549 {
550
551#ifdef CONFIG_USER_ONLY
552 abort();
553#else
554 int insns_left = cpu->icount_decr.u32;
555 if (cpu->icount_extra && insns_left >= 0) {
556
557 cpu->icount_extra += insns_left;
558 insns_left = MIN(0xffff, cpu->icount_extra);
559 cpu->icount_extra -= insns_left;
560 cpu->icount_decr.u16.low = insns_left;
561 } else {
562 if (insns_left > 0) {
563
564 cpu_exec_nocache(cpu, insns_left, *last_tb, false);
565 align_clocks(sc, cpu);
566 }
567 cpu->exception_index = EXCP_INTERRUPT;
568 *last_tb = NULL;
569 cpu_loop_exit(cpu);
570 }
571 break;
572#endif
573 }
574 default:
575 break;
576 }
577}
578
579
580
581int cpu_exec(CPUState *cpu)
582{
583 CPUClass *cc = CPU_GET_CLASS(cpu);
584 int ret;
585 SyncClocks sc;
586
587
588 current_cpu = cpu;
589
590 if (cpu_handle_halt(cpu)) {
591 return EXCP_HALTED;
592 }
593
594 atomic_mb_set(&tcg_current_cpu, cpu);
595 rcu_read_lock();
596
597 if (unlikely(atomic_mb_read(&exit_request))) {
598 cpu->exit_request = 1;
599 }
600
601 cc->cpu_exec_enter(cpu);
602
603
604
605
606
607
608 init_delay_params(&sc, cpu);
609
610 for(;;) {
611
612 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
613 TranslationBlock *tb, *last_tb = NULL;
614 int tb_exit = 0;
615
616
617 if (cpu_handle_exception(cpu, &ret)) {
618 break;
619 }
620
621 cpu->tb_flushed = false;
622 for(;;) {
623 cpu_handle_interrupt(cpu, &last_tb);
624 tb = tb_find_fast(cpu, &last_tb, tb_exit);
625 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
626
627
628 align_clocks(&sc, cpu);
629 }
630 } else {
631#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
632
633
634
635
636 cpu = current_cpu;
637 cc = CPU_GET_CLASS(cpu);
638#else
639
640 g_assert(cpu == current_cpu);
641 g_assert(cc == CPU_GET_CLASS(cpu));
642#endif
643 cpu->can_do_io = 1;
644 tb_lock_reset();
645 }
646 }
647
648 cc->cpu_exec_exit(cpu);
649 rcu_read_unlock();
650
651
652 current_cpu = NULL;
653
654
655 atomic_set(&tcg_current_cpu, NULL);
656 return ret;
657}
658